Introduction
This blog provides a software update to the Voltage Interruption
Tester discussed in previous posts
Code Changes
A simple software watchdog was added to the code. The watchdog
duration was determined by measuring the maximum cycle time of the main
loop with some additional time to account for jitter.
Decrementing counter was placed in the system timer.
/*******************************************************************************
* @brief System Timer
* @note 1 ms
*******************************************************************************/
CY_ISR(Timer_System_isr)
{
...
if (WD_Ctr != 0)
{
WD_Ctr--;
if (WD_Ctr == 0)
{
CySoftwareReset(); /* Should never get here */
}
}
...
}Time timer was refreshed in main.
/*******************************************************************************
* @brief Main
* @return The point of no main
*******************************************************************************/
int main()
{
...
while(1u)
{
...
WD_Ctr = WD_TIMEOUT;
}
}Downloads
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| Interruption Tester 0.1d PSoC Project |
