PLC Input Circuit for PSoC, Raspberry Pi, Beagle, OLinuXino, Cubieboard - High voltage tolerant

Summary
This blog features a PLC input circuit that can be adapted for microcontrollers such as PSoC, Amtel, PIC and mini-PC boards such as the Raspberry Pi, Beagle, OLinuXino and Cubieboard to name a few.

Typical PLC Input Circuits
In order to keep used Printed Circuit Board (PCB) area and productionisation costs at a minimum, some commercial PLC input circuits are understandably designed with minimal components and protection. With the addition of a few components, these input sections can be made more robust with respect to the input voltage.

Example PLC Input Circuit

PLC Input Circuit Improvement

The input circuit in the illustration below contains the requisite optocoupler 'opto' LED current limiting resistor R1, which also forms a voltage divider with R2. This divider prevents the maximum LED voltage of opto O1 being exceeded in normal operation. These parts also define the turn ON behaviour for the input, depending on some of opto characteristics. Added to the design were the dual Zener D1 and capacitor C1.

Improved PLC Input Circuit

The Zener was added to protect the input and allow the input to take constant over-voltage up to 100VDC with brief exposure of voltages up to 150VDC. 

Under normal conditions, low voltages to 24VDC, D1b has little to no effect as the voltage at the divider of R1 and R2 is marginally lower than the Zener breakdown voltage. At higher voltages D1b conducts protecting the opto LED. However some of the components risk irreversible damage from over voltage or failure from overheating if the input is exposed to higher voltages for long periods. Higher rated components can be chosen to mitigate this issue.

The filter capacitor C1 was added to add some filtering to the input signal however it lowers the response of the input to the low kilohertz region. Lowering the value of C1, or removing C1 completely could be one solution to improving the input response, although noise can become an issue.

PLC Input Sensitivity
While the proposed PLC circuit in this blog was not designed to adhere to PLC standards such as EN61131-2, this design could be loosely considered a Type 3 low power design (2-15mA).

To update the design into a Type 2 design (6-30mA) the resistor R1 could be reduced to 2.7k 1W and R2 to 470R. These resistor values can be adjusted up and down depending on the practical application.

PLC Inputs: Practical Example

For example purposes a jellybean 4N28 opto in a practical setup, wired in saturated mode, was implemented. For differences between opto modes of operation such as linear and saturated mode, see Learn About Electronics.

4N28 - Courtesy Vishay

Consider the implementation of the PLC circuit on breadboard.

Breadboard Input Circuit

In the image above the Yellow wire is the equivalent PLC input and the Green wire toward the bottom of the image is the 0V. The Red wire is a separate 3.3VDC supply with the Green wire at the upper right of the image being the 0V.

A benchtop triple output power supply was operated with two outputs in series to achieve a 0 - 70VDC range and the third output was fixed at 3.3VDC to supply a LED driven from the 4N28.

Power Supply - Voltage Settings

Adjusting the input voltage between 0 to 8VDC yielded little change in the state of the LED. The minimum turn on voltage for the LED was 9V which allowed only a few micro amps flowing through the LED. The current flowing through the 220R dropper resistor was measured as a function of the PLC input voltage.

Forward LED Current vs Input Voltage (PLC Input)

The data shown below is for the above graph.

Measurements of Forward LED Current and Input Voltage (PLC Input)

Since the LED used for the example was a superbright RED, the LED turn ON was easily visible at approximately 14V DC in daylight. However under low light conditions the LED could be seen to turn ON at 10V DC.

Adding a Schmitt Gate

Next a Schmitt gate was added to the output of the opto. Two gates (inverting outputs) were connected in series, then the LED was driven from the output of the second gate. The opto remained configured in saturated mode however the input of the 74HC14 gate is driven by a pull-up on the collector of the opto output. The gate input is a high impedance CMOS input which has defined voltage thresholds for operation.

PLC input with buffer

Part of the functionality of the HC14 gate is hysteresis. Adding the gate to the design results in the LED turning ON when the input voltage, IN+, is 10.8V DC and OFF at 10.5V DC. The defined LED behaviour follows the gate input voltage thresholds, unlike the output of the opto which is dependent on forward current through the LED and the current transfer ratio. If the 300mV hysteresis is not required, another gate/buffer or even a Darlington opto could be used in its place.

PLC Input with Buffer

Furthermore, if input isolation is not required then the opto itself may be replaced with a suitable gate of choice, resulting in a further simplified PLC input design.

Other Alternatives
There are a few alternatives that come to mind to replace the humble opto. These include the magnetic, inductive and capacitive coupled Digital Isolators such as the devices from Silicon Labs, Texas Instruments and Analog Devices to name a few. At a slightly higher cost and more suited as output devices, are the ranges of Solid State Relays. SSR's are manufactured by companies such as Ixys, Panasonic, Toshiba and Vishay.

Tracer MT-5 Protocol. Communications to Tracer MPPT

Summary
Featured in this blog is a tear down of the EPSolar MT-5. The aim of the tear down was to assist in determining the communication protocol between the
MT-5 display and main EPSolar MPPT unit. 

Hardware
Although the Tracer MPPT and display models shown below are no longer sold by EPSolar, there were still numerous re-seller sites with stocks which raised my interest in using one for garden lighting control. This would require manual control of the load output.

EPSolar - Tracer MPPT Module

EPSolar - MT-5 Display

There are more than a dozen sites with example code for the communications however none of it is complete. In order to determine the protocol the only two methods that came to mind were connecting with the EPSolar PC Monitoring software or monitoring the communications between the MPPT and display. The latter of the two methods was used.

MT-5 Teardown

The MT-5 from the rear appeared as a sealed unit, so removing the front window (lexan) was the first step to gain access.

EPSolar MT-5 with front cover removed

After the window was removed, there were four screws to retain the main board and a few melted plastic posts to hold a secondary board containing the buttons.

EPSolar MT-5 PCB

After removing the boards both the main microcontroller ST - STM8S903K and LCD driver from Holtek - HT1621 were visible on the rear of the board. On the top side of the board was the LCD and LED light box serving as the LCD backlight.

MT-5 Protocol
Initial documentation for the EPSolar communications protocol was reviewed from Steve Pomeroy, John Geek and a document site with concise documentation by Marc Dilasser. 

Validation of the CRC16 was made using a site from Bastian Molkenthin.

MT-5 Hardware
To determine the protocol, a test system consisting of an MPPT connected to an MT-5 display with a pair of USB to TTL converters were used in conjunction with RealTerm.

Upon measuring the supply for the ST micro the voltage was confirmed to be 3.3VDC. A Prolific PL2303 adaptor, such as the unit from Core Electronics shown in the image below, was interfaced with the transmit and receive lines on the RJ45 connector. 

Prolific USB to TTL Adaptor

Pin 5 and 6 of the EPSolar RJ45 were receive and transmit respectively. Additionally it was noted that the transmit line was not driven from rail to rail but between 1.2V and 3.3V. This resulted in incorrect or no data seen by RealTerm in most cases. After consulting the datasheet for the driver in the USB adaptor (PL2303RA) it was noted that this specified 0.3 * 3V3 as the maximum voltage for a CMOS low (VIL). To resolve this a resistor divider with two 22K resistors was added to lower the amplitude of the signal.

Data Collection

The MT-5 sent two request packets to the MPPT on startup:

EB 90 EB 90 EB 90 01 AC 01 00 82 7B 7F      Current Battery, Modes Request *

* It should be noted that the battery and mode request is performed only once where as the real time data is updated on a regular basis.

EB 90 EB 90 EB 90 01 A0 01 03 BD BB 7F      Real Time Data Request


The responses for the unit under test were:
EB 90 EB 90 EB 90 00 AC 07 00 00 0A 03 01 11 12 D9 4A 7F


EB 90 EB 90 EB 90 00 A0 18 B9 09 00 00 00 00 00 00 AC 08 68 0B 00 00 00 26 00 00 00 00 38 00 00 00 E6 26 7F

Each of the settings on the MT-5 menu were changed and the packet exchange recorded.

Battery Type
EB 90 EB 90 EB 90 01 AD 07 00 00 03 01 14 10 12 3D 22 7F         Sealed
EB 90 EB 90 EB 90 01 AD 07 00 00 03 02 14 10 12 CD 21 7F GEL
EB 90 EB 90 EB 90 01 AD 07 00 00 03 03 14 10 12 9D 20 7F         Flooded

Battery Capacity (AH)
EB 90 EB 90 EB 90 01 AD 07 00 00 00 03 01 10 12 05 4A 7F   10AH min

EB 90 EB 90 EB 90 01 AD 07 00 00 00 03 5A 10 12 84 AC 7F 900AH max

Battery Compensation (mV/C)
EB 90 EB 90 EB 90 01 AD 07 00 00 00 03 14 10 12 51 1F 7F         0mV/C
EB 90 EB 90 EB 90 01 AD 07 00 00 0A 03 14 10 12 D9 1F 7F         -10mV/C

Timer 1 Setting
EB 90 EB 90 EB 90 01 AD 07 00 00 00 03 5A 00 12 80 F9 7F         Setting 0

EB 90 EB 90 EB 90 01 AD 07 00 00 00 03 5A 11 12 D1 FD 7F Setting 17

Timer 2 Setting
EB 90 EB 90 EB 90 01 AD 07 00 00 00 03 5A 12 01 0A 9C 7F         Setting 1

EB 90 EB 90 EB 90 01 AD 07 00 00 00 03 5A 12 11 1E CD 7F         Setting 17

For any change in settings the MPPT responded with a confirmation.
EB 90 EB 90 EB 90 00 AD 00 B0 5C 7F

To determine the battery and modes packet on startup some of the settings were changed to determine the packet structure.

EB 90 EB 90 EB 90 00 AC 07 00 00 0A 03 01 11 12 D9 4A 7F         Timer 1 17, Timer 2 n
EB 90 EB 90 EB 90 00 AC 07 00 00 0A 03 5A 11 12 58 AC 7F Battery capacity 900AH
EB 90 EB 90 EB 90 00 AC 07 00 00 0A 01 5A 11 12 F8 AE 7F         Battery type sealed
EB 90 EB 90 EB 90 00 AC 07 00 00 01 01 5A 11 12 34 BB 7F         Battery compensation 1mV/C

There appeared to be some additional data in the packet however it was not identified at the time.

From the MT-5 manual load control was enabled with Timer 1 set to Manual (On/Off Mode). The Power/Esc button on the MT-5 was presses and the packets recorded.

EB 90 EB 90 EB 90 01 AA 01 01 1D 9B 7F Load ON


EB 90 EB 90 EB 90 01 AA 01 00 0D DA 7F       Load OFF

To verify the position of the load status in the real time data packet this was also collected.

EB 90 EB 90 EB 90 00 A0 18 B2 09 09 00 00 00 00 00 AC 08 16 0B 01 00 00 2A 00 00 00 00 37 00 00 00 15 1A 7F        Load ON

EB 90 EB 90 EB 90 00 A0 18 B9 09 00 00 00 00 00 00 AC 08 16 0B 00 00 00 2B 00 00 00 00 37 00 00 00 A3 29 7F         Load OFF

Updated Protocol Document

With the jumble of packets collected, the original MPPT Protocol PDF document, Ver 3, "Protocol-Tracer-MT-5.pdf" by Alex Ruhmann was updated.

The protocol document was reformatted into "Protocol-Tracer-MT-5 V5.pdf". An example of the new layout in the V4 PDF shown below.

Battery / Timer Control Settings Request

Request	Command	Data Size	Data	Checksum
0x1	0xAC	0x01	0x00	CRC-16 0x1041

Example: EB 90 EB 90 EB 90 01 AC 01 00 82 7B 7F

Battery / Timer Control Settings Reply

Reply	Command	Data Size	Data	Checksum
0x0	0xAC	0x07	Byte 1: Load type (unused, 0x00)	CRC-16 0x1041
			Byte 2: Charging mode (unused, 0x00)
			Byte 3: Battery temperature compensation voltage. Range from 0 to 10. Units -mV/V
			Byte 4: Battery Type, 1 – Sealed, 2 – Gel, 3 – Flooded
			Byte 5: Battery Capacity, Range from 1 to 90 decimal. Units AH. Multiplied by 10 for actual AH battery rating.
			Byte 6: Timer 1 setting, Range 0 to 18
			Byte 7: Timer 2 setting, Range 1 to 18

Example: EB 90 EB 90 EB 90 00 AC 07 00 00 0A 03 01 10 12 8C 1B 7F

Downloads
An updated version of the Protocol (Ver5) available with an additional example of a software CRC16.

Protocol-Tracer-MT-5 V5.pdf

Protocol-Tracer-MT-5 V4.pdf

Cypress PSoC VT100 Code Example

Summary
As an alternative interface to one of my projects, basic VT100 functionality was implemented across serial (USB) on a Cypress PSoC4 BLE device. The Cypress iprintf code was used with a wrapper to implement basic VT100 features.

The screen capture below shows basic control of text and colour.

VT100 Example in TeraTerm

As a starting reference the Bash Hackers website was used for the VT100 escape codes. A plethora of information can be found at sites such as Technopedia, TermSys, NorthEastern Uni, ASCII-Table and ISP to name a handful. What has been provided is only a portion of the total VT100 commands available.

Code for the PSoC

For Cypress Creator development environment a separate VT100 source and header file were created with the necessary escape commands.

VT100 Commands

Foreground and background colors.

VT100 Colours

Cypress already provide a PSoC Creator example project with iprintf, which works effectively as the low level interface. A reference to this library was included in VT100 code.

To use a number of commands at once or to configure the location of the cursor a few functions were written, prototypes below. There is room to improve these functions but for testing they function as required.

VT100 Function Prototypes

Usage in the software main shown below.

VT100 Example Usage

Testing

Testing was also performed with other terminal packages such as PuTTY and RealTerm.

VT100 Example in PuTTY (Windows)

TermPuTTY under Ubuntu Mate, customised settings

VT100 Example in PuTTY (Ubuntu Mate)

RealTerm was placed in ANSI mode with good results, except for the colours.

VT100 Example in RealTerm

Downloads

vt100.c

vt100.h

PSoC Creator 3.3 VT100 Project

Change Summary

Version 1.02 (15 March 2017)

• Added GPL details
• Corrected two text command enumerations
• Updated PSoC Creator project

Version 1.01 (11 March 2017)

• Added defines for background colour
• Changed names of foreground colour defines
• Updated PSoC Creator project

Version 1.00 (26 February 2017)

• Created PSoC Creator project for initial vt100 commands