This blog presents an example design employing a net tie component. Although Altium Designer was used to illustrate the net tie example, many existing packages support net tie functionality.
Existing Documentation
The Altium website contains examples for using net tie components, such as those listed on the page "Breaking the PCB Design Challenges with Net Ties". Developers support pages should be a readers the first destination when knowing that a net tie is required for a design.
Example
Initially, the requirement to use a net tie may not be apparent. In the example circuit below, a differential voltage measurement is required for an Analogue to Digital (ADC) device. For the purposes of this blog, the differential voltage measurement has negative connection of the ADC referenced to 0 V.
The risk in connecting the negative ADC input, IN0_N, to the 0 V is the net name given to the pin. During routing of the board traces, the pin at the ADC input may be inadvertently tied to 0 V. Incorrect board routing can result in issues such as excessive noise floor voltages or inaccurate measurements not representative of the source (R1).
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| Example ADC Connections for Current Sensing without Net Ties |
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| Example Altium Netlist Options |
PCB Net
Net naming is shown in the capture below.
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| Altium Net Naming without a Net Tie, No Power Port Priority |
Note that the 0 V net was renamed to ADC_Sig.IN0_N.
Activating the power port priority checkbox in the Altium Netlist Options will ensure that the ADC_Sig.IN0_N net is renamed to 0 V. The net on the PCB appears as 0 V as shown in the capture below.
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| Altium Net Naming without a Net Tie, Power Port Priority |
To retain the two separate net names, 0 V and ADC_Sig.IN0_N, a component is required to separate the nets.
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| Example ADC Connections for Current Sensing with Net Tie |
For separating the nets, a net tie component is commonly used. Some designs may opt for a component such as a resistor with connected pads or thru-hole pad.
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| Altium Net Naming with a Net Tie, No Power Port Priority |
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| Rectangular Net Tie Component Close Up |
PCB Net Tie
The capture below illustrates a surface mount net tie with exposed pads.
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| PCB Net Tie with Rectangular Exposed Pads |
Net tie with solder mask covering pads.
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| PCB Net Tie with Rectangular Solder Masked Pads |
Round net tie constructed of two semi-circle polygons
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| PCB Net Tie with Round Exposed Pad |
Depending on the size and layout of the net tie component footprint, some PCB rules may require adjustment.
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| Rectangular Net Tie Component |
For the rectangular net tie component shown above, the distance between the individual traces is greater than 0.254 mm.
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| Round Net Tie Component |
The capture of the round net tie component above has a clearance violation using a standard clearance rule of 0.254 mm. PCB Clearance Rules should be configured to account for the proximity of pads or traces.
Final Thoughts
To preserve individual net names in a schematic which make a common electrical connection, the net tie component is a practical solution for PCB designers.
Alternatives to the net tie component include using a resistor, connector or abutting pads. The component pads are connected with traces, fills or polygons. For these solutions, PCB Clearance Rules should be configured to resolve resulting violations.
