Saturday, 25 February 2017

Cypress PSoC VT100 Code Example

Summary
As an alternative interface to one of my projects, basic VT100 functionality was implemented across serial (USB) on a Cypress PSoC4 BLE device. The Cypress iprintf code was used with a wrapper to implement basic VT100 features.

The screen capture below shows basic control of text and colour.

VT100 Example in TeraTerm
VT100 Example in TeraTerm

As a starting reference the
Bash Hackers website was used for the VT100 escape codes. A plethora of information can be found at sites such as Technopedia, TermSys, NorthEastern Uni, ASCII-Table and ISP to name a handful. What has been provided is only a portion of the total VT100 commands available.

Code for the PSoC
For Cypress Creator development environment a separate VT100 source and header file were created with the necessary escape commands.


VT100 Commands
VT100 Commands
Foreground and background colors.


VT100 Colours
VT100 Colours

Cypress already provide a PSoC Creator example project with iprintf, which works effectively as the low level interface. A reference to this library was included in VT100 code.

To use a number of commands at once or to configure the location of the cursor a few functions were written, prototypes below. There is room to improve these functions but for testing they function as required.


VT100 Function Prototypes
VT100 Function Prototypes

Usage in the software main shown below.

VT100 Example Usage
VT100 Example Usage


Testing
Testing was also performed with other terminal packages such as PuTTY and RealTerm.

VT100 Example in PuTTY (Windows)
VT100 Example in PuTTY (Windows)
TermPuTTY under Ubuntu Mate, customised settings

VT100 Example in PuTTY (Ubuntu Mate)
VT100 Example in PuTTY (Ubuntu Mate)

RealTerm was placed in ANSI mode with good results, except for the colours.

VT100 Example in RealTerm
VT100 Example in RealTerm

Downloads


vt100.c
vt100.c

vt100.h
vt100.h



Change Summary

Version 1.02 (15 March 2017)
  • Added GPL details
  • Corrected two text command enumerations
  • Updated PSoC Creator project
Version 1.01 (11 March 2017)
  • Added defines for background colour
  • Changed names of foreground colour defines
  • Updated PSoC Creator project
Version 1.00 (26 February 2017)
  • Created PSoC Creator project for initial vt100 commands


Wednesday, 15 February 2017

MCP23S17 IO Port Expander Header File / Register

Summary
For a recent project the 16bit IO Expander, MCP23S17, from Microchip was enlisted for low voltage input scanning. 

Searching online, at the time of writing this blog, there were no projects using this part with sample code. 

Below is the header file that may be of use.


MCP23S17 Microchip IO Expander QFN Package
Microchip IO Expander QFN Package


Downloads


mcp23s17.h

Code


/******************************
* mcp23s17.h
******************************/

#ifndef mcp23s17_h
#define mcp23s17_h

typedef unsigned char   uint8;
    
#define MCP_READ   0x41     /* Read */
#define MCP_WRITE   0x40     /* Write */
#define Mode_8Bit     1         /* Addressing 8/16bit */
#define Mode_16bit    0

#ifdef Mode_16Bit
    /******************************
    * Control register for BANK=0
    ******************************/
    #define IODIRA        0x00      /* Data Direction Register for PORTA */
    #define IODIRB        0x01      /* Data Direction Register for PORTB */ 
    #define IPOLA         0x02      /* Input Polarity Register for PORTA */ 
    #define IPOLB         0x03      /* Input Polarity Register for PORTB */ 
    #define GPINTENA      0x04      /* Interrupt-on-change enable Register for PORTA */ 
    #define GPINTENB      0x05      /* Interrupt-on-change enable Register for PORTB */ 
    #define DEFVALA       0x06      /* Default Value Register for PORTA */    
    #define DEFVALB       0x07      /* Default Value Register for PORTB */      
    #define INTCONA       0x08      /* Interrupt-on-change control Register for PORTA */  
    #define INTCONB       0x09      /* Interrupt-on-change control Register for PORTB */      
    #define IOCON         0x0A      /* Configuration register for device */                      
    #define GPPUA         0x0C      /* 100kOhm pullup resistor register for PORTA (sets pin to input when set) */    
    #define GPPUB         0x0D      /* 100kOhm pullup resistor register for PORTB (sets pin to input when set) */      
    #define INTFA         0x0E      /* Interrupt flag Register for PORTA */        
    #define INTFB         0x0F      /* Interrupt flag Register for PORTB */    
    #define INTCAPA       0x10      /* Interrupt captured value Register for PORTA */  
    #define INTCAPB       0x11      /* Interrupt captured value Register for PORTB */    
    #define GPIOA         0x12      /* General purpose I/O Register for PORTA */  
    #define GPIOB         0x13      /* General purpose I/O Register for PORTB */ 
    #define OLATA         0x14      /* Output latch Register for PORTA */ 
    #define OLATB         0x15      /* Output latch Register for PORTB */
#endif

#ifdef Mode_8Bit
    /******************************
    * Control register for BANK=1
    ******************************/
    #define IODIRA        0x00      /* Data Direction Register for PORTA */
    #define IPOLA         0x01      /* Input Polarity Register for PORTA */  
    #define GPINTENA      0x02      /* Interrupt-on-change enable Register for PORTA */     
    #define DEFVALA       0x03      /* Default Value Register for PORTA */    
    #define INTCONA       0x04      /* Interrupt-on-change control Register for PORTA */     
    #define IOCONA        0x05      /* Configuration register for device */          
    #define GPPUA         0x06      /* 100kOhm pullup resistor register for PORTA (sets pin to input when set) */     
    #define INTFA         0x07      /* Interrupt flag Register for PORTA */
    #define INTCAPA       0x08      /* Interrupt captured value Register for PORTA */
    #define GPIOA         0x09      /* General purpose I/O Register for PORTA */  
    #define OLATA         0x0A      /* Output latch Register for PORTA */ 
    #define IODIRB        0x10      /* Data Direction Register for PORTB */ 
    #define IPOLB         0x11      /* Input Polarity Register for PORTB */ 
    #define GPINTENB      0x12      /* Interrupt-on-change enable Register for PORTB */
    #define DEFVALB       0x13      /* Default Value Register for PORTB */      
    #define INTCONB       0x14      /* Interrupt-on-change control Register for PORTB */
    #define IOCONB        0x15      /* Configuration register for device */  
    #define GPPUB         0x16      /* 100kOhm pullup resistor register for PORTB (sets pin to input when set) */        
    #define INTFB         0x17      /* Interrupt flag Register for PORTB */    
    #define INTCAPB       0x18      /* Interrupt captured value Register for PORTB */    
    #define GPIOB         0x19      /* General purpose I/O Register for PORTB */ 
    #define OLATB         0x1A      /* Output latch Register for PORTB */
#endif
    
/* Config bits - IOCON */
#define BANK  0x80
#define MIRROR  0x40
#define SEQOP  0x20
#define DISSLW  0x10
#define HAEN  0x08
#define ODR      0x04
#define INTPOL  0x02

/******************************
* Prototypes
******************************/
void MCP23S17_init();
void MCP23S17_write(uint8 address, uint8 value);
uint8 MCP23S17_read(uint8 address);
uint8 MCP23S17_verify(uint8 address, uint8 verify_data);
    
#endif
/* END */



Change Summary

Version 1.00 (10 February 2017)

  • Created register mapping for MCP23S17, 8 and 16 bit modes

Thursday, 31 December 2015

PSoC to Tracer MPPT 1210RN 2210RN 3215RN 4210RN with Bluetooth and Datalogger

Summary
Although the early EPSolar MPPT Tracer series with remote display have been surpassed by improved MPPT models with inbuilt LCDs, there are plenty of the earlier models that remain in operation. This project is Cypress PSoC 4 BLE based and features connection to the Tracer MPPT, load control, Bluetooth and data logging of the MPPT data.

MPPT
A number of other people have used the EPSolar MT-5 display to reverse engineer the communications protocol, however there was PC software from the same manufacturer which performed all the same functions, possibly more.
EPSolar Tracer RN MPPT
EPSolar Tracer RN MPPT
At last glance of the EPSolar website the Tracer series had reached obsolescence and the PC software on the site no longer supports the Tracer series.

Hardware
Initial documentation for the MPPT connections were taken from a site by Steve Pomeroy, another two sites by John Geek. The 8 way RJ connections to the Tracer were drafted with an optional zero ohm link added such that the MPPT could power the project. Buffers were added to the transmit and receive lines, although not a necessity, to ensure some protection for the PSoC from the real world.


EPSolar Tracer RJ45 Connections
EPSolar Tracer RJ45 Connections

For the display an OLED or LCD capable of being powered from 3.3V for both the logic and backlight was selected. In most instances this results in the LCD contrast voltage being negative however this was generated by the PSoC using the circuit shown below.


LCD Connections
LCD Connections
Four momentary push buttons were used instead of the Cypress Capsense feature. This solution using switches was chosen only due to the design of the hardware as the PCB was to be mounted inside a box and away from the lid.


Buttons / User Interface Connections
Buttons / User Interface Connections

The power supply regulator was chosen to be small and the usual buck topology. The LMR14203 has been my default single output regulator for some time, certainly there are newer devices with higher efficiency in the low current region of operation. In the event the display that was chosen could not have the backlight operate from 3.3V, a linear 5V regulator was added for testing.


Power Supply Connections
Power Supply Connections

Even though the design incorporated Bluetooth, USB was added for debugging, downloading of data and upgrading of the PSoC. Field upgrades would be possibly by using the PSoC bootloader, a program allowing the active application to be updated some time in the future. The FTDI FT230X was chosen for the USB implementation however for those looking for a similar priced and reliable solution the Cy
press CY7C65213A-32 would also be a good choice.

FTDI USB Connections
FTDI USB Connections

The PSoC selected was the CY8C4247LQI-BL483, which features a 48MHz System Clock, 128K FLASH and the all important Bluetooth. Although the PSoC4 libraries did not support SD at the time of writing, there are a few alternatives from the PSoC Community.


PSoC Connections and Supply Filtering
PSoC Connections and Supply Filtering
Lastly bringing all the sub-sheets together is the top sheet as shown below.


Project Top Sheet
Project Top Sheet

PCB Enclosure
The PCB was designed to fit into a plastic enclosure with a clear lid, no bells no whistles. A Ritec case from a local supplier was used, the Altronics H0324.


Altronics H0324 enclosure
Altronics H0324 enclosure

With the enclosure size selected the PCB dimensions were set to 98mm (W) x 75mm (H).

PCB Design
For the schematic and board design Altium was chosen since the board was mixed logic with RF. This combination was always in my mind a four layer board. The board layer stack would follow the usual two middle power planes and signals on the outside layers.

There were a number of parts added to the component database although none more interesting that the meandered inverted-F antenna (MIFA) to suit the PSoC4 BLE part. The antenna design was well documented in the Cypress Application Note - AN91455. This antenna was implemented as described on Page 10 of the Application Note.


PSoC4 BLE MIFA
PSoC4 BLE MIFA 
The board shape was drawn and a work guide added for the position of the four push buttons, then all components were place on the PCB.

Tracer MPPT Interface Board
Tracer MPPT Interface Board
With some quick shuffling of parts then an idea of the layout could take place.

Tracer MPPT Interface Board Parts Placement
Tracer MPPT Interface Board Parts Placement
Parts positions were changed on the PCB with some connectors and the SD card moved to the bottom layer.


Tracer MPPT Interface Board Final Part Placement
Tracer MPPT Interface Board Final Part Placement
A few hours later the final route is shown below.


Tracer MPPT Interface Board Final Route
Tracer MPPT Interface Board Final Route
The board in 3D shows the stacking of the LCD and logic board.

Tracer MPPT Interface Board with LCD
Tracer MPPT Interface Board with LCD
PCB Prototype
The PCB was hand populated for both top and bottom layer. Some last minute modifications were made to the LCD connector and backlight control because the four line LCD had to be changed to another manufacturer. LCD supply pins were swapped.


Top Layer MPPT PCB Populated
Top Layer MPPT PCB Populated
Bottom Layer MPPT PCB Populated
Bottom Layer MPPT PCB Populated
To mount the LCD to the MPPT board, a male pin header was soldered to the bottom side of the LCD. To space the LCD and MPPT board 12mm tapped metal spacers were used.


Spacers for MPPT PCB and LCD
Spacers for MPPT PCB and LCD

USB Check
Two of the hardware connections that were used for debugging this particular project were the Cypress MiniProg3 programmer and the USB port. Certainly the LCD or on-board status LED could also be useful although the background debugger and serial port usually work sufficiently.

With the USB connected between the MPPT board and a Windows PC, the FDTI chip was configured using the FTDI application FT Prog. This application was used to disable three unused CBUS pins and reconfigure the fourth for USB bus voltage detection.


FT Prog Scan
FT Prog Scan
The Scan command was issued the the FTDI device was located.


FT Prog Default CBUS Settings
FT Prog Default CBUS Settings
From the list shown in the Device Tree pictured above, the 'Hardware Specific' item was expanded and the 'CBUS signals' entry was selected.


FT Prog Updated CBUS Settings
FT Prog Updated CBUS Settings
The settings were modified as shown above which enabled voltage sensing for the USB - VBUS_Sense. All other CBUS pins were unused and therefore tristated.


FT Prog Program
FT Prog Program
To save the CBUS settings changes using FT Prog, the 'Program' command was used. As shown in the capture above a 'Program Devices' dialog allows for confirmation of the Program process then subsequent programming.


RealTerm Loopback Test for MPPT Board
RealTerm Loopback Test for MPPT Board
In order to test the USB a dummy PSoC application was made to loopback the Tx and Rx pins, P0.4 and P0.5 respectively. RealTerm was then used to test the loopback at 921600 - no issues were noted.

Software - Prototype
After the initial hardware checks of the boards power rails some initialisation code was written to check the LCD, buttons and communications. Below is an example of the initialised LCD.


Initialised LCD for Testing
Initialised LCD for Testing

A prototype project, certainly with some bugs, is available for download below.
Prototype Tracer PSoC MPPT Interface
Prototype Tracer PSoC MPPT Interface
The prototype project implements communications to the Tracer MPPT and display of current MPPT readings to LCD. Some of the current MPPT readings are also sent to the USB port for logging.

Serial Data Logging
The data logging 'USB output' was rather raw code with the sole purpose of providing a console output capable of being imported into Microsoft Excel. The UART Update function was called every minute and send some basic information to a terminal application.

void UART_Update() 
{
    char UART_Buf[20];
    uint16_t UART_temp;

    UART_UartPutString(LINE1_PV);
    UART_temp = MPPTPanelVoltage;                           /* Temp memory to modify for display */
    sprintf(UART_Buf, "%d.%02d%s%c", (UART_temp/100), (UART_temp%100),"V",0x9);
    UART_UartPutString(UART_Buf);
    UART_UartPutString(LINE1_BV);
    UART_temp = MPPTBatVoltage;                             /* Temp memory to modify for display */
    sprintf(UART_Buf, "%d.%02d%2s%c", (UART_temp/100), (UART_temp%100),"V ",0x9);
    UART_UartPutString(UART_Buf);   
    UART_UartPutString(LINE2_BI);  
    UART_temp = MPPTBatteryCurrent;                         /* Temp memory to modify for display */
    sprintf(UART_Buf, "%d.%02d%s%c", (UART_temp/100), (UART_temp%100),"A",0x9);
    UART_UartPutString(UART_Buf);
    if (System.MPPT_Load_Is_On == true)
    {
        UART_UartPutString(" Load On\r\n");
    }
    else if (System.MPPT_Load_Is_On == false)
    {
        UART_UartPutString(" Load Off\r\n");
    }
}

Shown below is an example of the data output to a terminal application.
MPPT Example UART Output
MPPT Example UART Output
The output panel voltage displayed in the terminal window was also used to verify the position and angle of the solar panel. Moving the solar panel a few degrees off axis to the sun appeared to make no appreciable difference in the readings.

MPPT Protocol
The protocol was verified and confirmed in another of my blogs which can be found at http://electronicmethods.blogspot.com.au/2017/03/tracer-mt-5-to-mppt-communications.html

SD Card
The SD card implementation was scheduled to use the Element 14 community project #50 implementation for the PSoC4, which uses a modified version of the Segger / Cypress EmFile. In early part of '18 an article appeared Hackser.io with an implementation using Segger libraries by Hima from Cypress allowing SCB (Serial Communication Block) or UDB's (Universal Digital Blocks) for communications to the SD card.

Downloading and compiling the example from Hackster illustrated how easily the project could be changed between SCB or UDB's. Another feature buried in the API's are related SD card functions which are non-blocking. For full details see the Hackster.io site with credit to Hima. Note the Segger library license requirement.

In the capture below, are the two additional directories for adding the SD Card libraries to the MPPT project.


PSoC4 SD Card Libraries Compiler Entries
PSoC4 SD Card Libraries Compiler Entries
Similarly the Linker references one additional directory.


PSoC4 SD Card Library Linker Entry
PSoC4 SD Card Library Linker Entry
To test the SD Card the appropriate File System header file was included and blocking writes were made to the SD card - a snippet is shown below.

#include <FS.h>
...
...
if ((pFile) && (SD_Removed_Read() == false))
    {      
        UARTCrLf[0] = 0x0a;UARTCrLf[0] = 0x0d;

        FS_Write(pFile, PV_string, strlen(PV_string));
        FS_Write(pFile, "," , 1u);
        FS_Write(pFile, BV_string, strlen(BV_string)); 
        FS_Write(pFile, "," , 1u);
        FS_Write(pFile, BI_string, strlen(BI_string)); 
        FS_Write(pFile, "," , 1u);
        FS_Write(pFile, TE_string, strlen(TE_string));
        FS_Write(pFile, "," , 1u);
        FS_Write(pFile, LOAD_string, strlen(LOAD_string));
        FS_Write(pFile, UARTCrLf , strlen(UARTCrLf));
    }

The rather inelegant code above was for testing opening of the log file written to the SD card, by Excel, Libre Office or another similar application with CSV capabilities. Shown below is a sample of the log from the SD card.

0.00V,13.34V,0.00A,25C,OFF
0.14V,13.34V,0.03A,25C,ON 
0.14V,13.32V,0.02A,25C,ON 
0.14V,13.32V,0.02A,26C,ON 

Next up scheduling control of the SD card....

Thursday, 5 November 2015

Beta Layout Reflow Controller with USB (FTDI FT311) connection to Android Phone

Summary
As a follow-on from the original Beta Layout post, this information shows one method of connecting the Beta Layout reflow controller serial interface, to an Android compatible phone with some off the shelf hardware.

Reflow Controller
The Beta Layout Reflow Controller (V2) provides a connection to it's inner workings through a serial port (RS232), 9 pin D type connector. While moving a laptop to the reflow controller every time the controller requires and adjustment, there are devices such as the FTDI USB specific hardware to suit interfaces with Android phones.

USB Development Module
One of these devices, FT311, is a plug and play USB Host chip for Android devices. There is an associated development module, UMFT311EV, that provides a number of interfaces, one being RS232. The header pinouts on the module suits off the shelf adaptor boards and some shields.


FTDI FT311 Dev Module
FTDI FT311 Dev Module

RS232 Adaptor
The FTDI board is TTL so an RS232 shield such as the model from DFRobot can be used to make the required conversion.

DFRobot RS232 Shield
DFRobot RS232 Shield

While the 5V and 0V power header is pin compatible between the boards, the communications header with TX, RX, CTS and RTS requires a few jumpers.

Linking Interboard TTL
From Section 4.1.2 of the UMFT311EV datasheet the hardware connections are identified.


UART Hardware Pinouts
UART Hardware Pinouts

Since the hardware handshaking is not used these two pins 5 and 6, can be joined together for now.

DF Robot J1 Pinouts
DF Robot J1 Pinouts

The corresponding Tx and Rx connections as shown on the DF Robot shield schematic, follow the Arduino shield mapping and are available on pins 1 and 2.
To make the modifications, pins 1 and 2 on the Robot shield are snipped off or pulled to the side as not to mate with the FT311 development module.


DF Robot Jumper Connections
DF Robot Jumper Connections

Using wire links or a pin header inserted into J1 on the Robot shield, pin 1 RXD is linked to pin 4 or RXD for the USB. Then pin 2 TXD is linked to pin 3 or TXD for the USB. Lastly pins 5 and 6, CTS and RTS are linked.


The FT311 module and Robot shield can be fitted together.

RS232 Cable
Since both the communications devices sport a 9 pin female D connector a null modem cable is required between them.

Hardware Assembly
The other two pieces of hardware required are a power supply or plug pack to suit the development module and the USB charging cable used with the Android phone.


Assembled FT311 and RS232 Shield Hardware
Assembled FT311 and RS232 Shield Hardware

Android Terminal Program
To communicate with the Development board FTDI provide AOA HyperTerm, which is a basic terminal interface for the Android. Available on the Google Play Store and passes the Android MyPermissions and 360 Security checks.

With the HyperTerm application installed and the hardware setup powered then phone can be connected to the charging cable. In doing so the HyperTerm application is automatically launched.


AOA HyperTerm Application from FDTI
AOA HyperTerm Application from FDTI


To configure the communications select the Settings button then choose the interface required. For the Beta Layout reflow controller, 9600, 8, N, 1 are the communications settings and since the hardware handshaking is looped at the DF Robot shield, the default settings in HyperTerm can be used.


AOA HyperTerm Communications Settings
AOA HyperTerm Communications Settings

After selecting Configure commands can be exchanged with the reflow controller.

AOA HyperTerm Communications Settings Confirmation
AOA HyperTerm Communications Settings Confirmation

Starting with sending help and a CR the list of available commands is returned.

Beta Layout commands on AOA HyperTerm
Beta Layout commands on AOA HyperTerm

In the screenshot above the help screen and status data is displayed in the HyperTerm window. The status information is configured for bursts at five second intervals which is used to track the starting and operational temperatures.

The final setup of the hardware as used on the bench is shown below. For similar and compatible Android USB hosts, shields or development kits the same process should be possible!

Beta Layout, USB Dev Kit, RS232 Shield with Android and AOA HyperTerm
Beta Layout, USB Dev Kit, RS232 Shield with Android and AOA HyperTerm