Sunday, 3 June 2018

Rexon RDM 150D Drill Press Refurb

Summary
This blog follows the refurbishment of a twenty year old Taiwanese drill press, model RDM 150D, manufactured by RexonThe drill press manufacturer is still in business at the time of releasing this blog although Rexon only lists one model of floor standing drill press on its website, no spares.


RDM 150D Original State
RDM 150D Original State 
Below is the plate for the Rexon 3/4 HP drill press.


RDM 150D Name Plate
RDM 150D Name Plate
As the drill press was still in operating condition, there was principally cosmetic work to be performed on the drill press. 


Rust Removal
Most small metallic items were detached from the drill press to remove the surface rust. Larger items such as the drill press table were mounted in a vice and cut back to bare metal using a wire brush mounted to cordless drill. To keep the dust to a minimum during wire brushing, a light coating of motor oil was rubbed into the rusty surface.


RDM 150D Table After Cleaning
RDM 150D Table After Cleaning

Chrome surfaces were cleaned with 00 steel wool and a good helping of an aerosol lubricant WD-40.


RDM 150D Feeder Levers Before and After Cleaning
RDM 150D Feeder Levers Before and After Cleaning
Table locking bolts were clamped securely in a bench vice and cleaned with a wire brush. After cleaning a light coating of oil was applied to the surface.


RDM 150D Locking Bolt Before Cleaning
RDM 150D Locking Bolt Before Cleaning
RDM 150D Locking Bolt After Cleaning
RDM 150D Locking Bolt After Cleaning
The chuck was earmarked for replacement with a keyless variety. The arbor was still retained as it was reasonable condition.


RDM 150D Original Chuck with Arbor
RDM 150D Original Chuck with Arbor
To suit the original Rexon chuck a compatible JT-3 Taper Mount keyless chuck was installed.


Replacement Keyless Chuck
Replacement Keyless Chuck
The motor was removed and inspected for possible faults and wear and tear. An insulation tester was used to check for any breakdown in the motor windings. The motor passed a 1000V check between the 240V active and the case of the motor - earth.


Drill Press Induction Motor
Drill Press Induction Motor
During the motor removal the belts were inspected and deemed in need of replacement, no surprise after a decade of use.


Drill Press Dual Belts
Drill Press Dual Belts
The Rexon drill press employs a dual belt system with an idler pulley connecting the two belts. The ratio between the two belts and pulleys determining the speed (RPM) of the spindle pulley (chuck). On the Rexon drill press the position of the induction motor can be moved toward and away from the idler pulley to set the required belts tension.


Drill Press Replacement Belts
Drill Press Replacement Belts
Even though the drill press was relatively old, the belts were available off the shelf. The two types used were M-25 and M-26.


Original Mains Cabling
Original Mains Cabling
Although technically speaking there were no cuts, exposed conductors or similar issues with the mains cable this was replaced regardless. The old grey cable is best replaced with a thicker insulator such as the orange circular type shown below. Additionally mains plugs have undergone changes where the active and neutral are insulated rather than having completely exposed conductors on the plug.


Replacement Mains Cabling
Replacement Mains Cabling
During the recabling additional light was provided on the work area using an LED on a flexible arm. The fitting point for the base of the light was the service entry located between the spindle and the column.


Raco AC DC Power Supply
Raco AC DC Power Supply
To power the LED a 12V DC supply was used from Digikey - RAC04-12SC/W.


Navara LED Fitted to Service Plate
Navara LED Fitted to Service Plate
The 1W LED used for the drill press is an Automotive type and usually called either a map reading or flexible gooseneck light. Shown in the image above the Navara 87684BL map reading light with a 40cm arm which retails for much less than any commercial workshop equivalent - whether it is as good only time will be the judge. Note the Navara 5 year warranty!


Old Switch Wiring
Old Switch Wiring
All original cabling was removed and discarded.


Start Stop Switch Rewiring
Start Stop Switch Rewiring
To complete the rewiring the primary of the AC to DC converter was wired to the Start Stop switch. Wiring was made so that the LED could be powered as soon as the drill press was powered.


LED to Drill Press Mounting
LED to Drill Press Mounting
Once the LED wiring was connected to the DC side of the AC to DC converter all loose cables were tied away, electrical tape fitted were required and the service plate mounted back onto the drill press.


New Cables Mounted
New Cables Mounted
All the updated orange circular cable was fixed in position with the previous cable clamps.


LED Drill Press Activated
LED Drill Press Activated
With only natural light in the garage the LED makes a significant difference to the light on the work area. The switch for the light is in the head of the light itself so turning ON and OFF is quick and means that in many instances the arm does not need to be adjusted away from the work area.


Work Area LED Lighting
Work Area LED Lighting
Lastly a short video was captured of the Rexon drill press in operation. There is final alignment and belt tensioning required to reduce some of the noise which can be heard during a drilling cycle.



Additional
Pictured below is the motor starting capacitor from the drill press, 150 uF, AC 250 V (Working).

Rexon Drill Press Motor Starting Capacitor
Rexon Drill Press Motor Starting Capacitor

Saturday, 2 June 2018

Apple M2980 Membrane Matrix Pinouts

Summary
This blog details the membrane connector pinouts for the Apple M2980 keyboard and the associated key matrix.


Apple M2980 Keyboard
Apple M2980 Keyboard
The rear nameplate of the keyboard had the details as pictured below.


M2980 Nameplate
M2980 Nameplate
Keyboard Hardware
The M2890 model keyboard lends itself to custom project projects because this model had the keyboard row and column keys available on two membrane connectors.


M2980 Keyboard Internals
M2980 Keyboard Internals
Shown above is an image of the keyboard with the back off. For those paying attention that is 'liquid' damage toward the left hand corner of the image above.

A close-up of the circuit board 'PCB' which encodes the key presses into the Apple ADB format is pictured below.


M2980 PCB
M2980 PCB
For the custom project the original PCB was removed and the keys matrix for the two membrane connections (row and column) decoded manually. 


M2980 P1 and P2 Connector Pin Numbering
M2980 P1 and P2 Connector Pin Numbering
Several directly soldered PCB connections to the back of the PCB, continuity measurements using a multimeter and a multitude of key presses later, the matrix table shown below 'represents' the state of the keyboard used for testing.

Keyboard Matrix Connections


M2980 Membrane Matrix Connections
M2980 Membrane Matrix Connections
The information listed in this blog should be used for reference only and remains the intellectual property of Apple Inc and its subsidiaries

As noted in this blog, the original keyboard did have previous 'liquid' damage and not all keys may have been mapped. 

For the above shown table the Column connections (C0 through C8) refer to the P1 connector (Pins 1 thru 9). Columns start at 0 and the connector pin numbering starts at 1. Similarly the Row connections refer to the P2 connector - same numbering concept.

It should be noted that even after twenty years since its manufacture, this 'economical' model of the Apple keyboard can still find a purpose for the home hobbyist. 

Mouse Hardware
As a side note, the Apple ADB mouse associated with the keyboard was also being literally torn apart to access the microcontroller (possibly an early PIC) when I noted something curious. 

Whether required as part of the physical design of the mouse, or a cheeky play on the die design for the ABS plastic by the Mechanical Engineer(s) in the project, it made me consider where Apple was, where it is now and when it all changed. No doubt face for thought!!


Apple ADB Mouse Torn Down
Apple ADB Mouse Torn Down

Tuesday, 22 May 2018

Delta (AFB1212SHE) Fan Testing

Summary
This blog covers some basic measurements of the Delta (AFB1212SHE) DC brushless fan with a possible use of the fan for computer cooling.


Delta AF1212SHE DC Brushless Fan
Delta AF1212SHE DC Brushless Fan
Hardware Setup
To perform measurements of the current drawn by the fan across and a range of input voltages, the displayed values on from a Rigol DP832 power supply were utilised. For the tacho measurements a Cypress CY8CKIT-049 development board was employed to convert the tacho output from the Delta fan into a corresponding RPM value.


CY8CKIT-049 - Courtesy Cypress Semiconductor
CY8CKIT-049 - Courtesy Cypress Semiconductor


For the PSoC input a pullup resistor (4k7) was connected between the 5V DC supply and the input pin.


PSoC - Delta AFB1212SHE Test Bed
PSoC - Delta AFB1212SHE Test Bed
PSoC Tacho Measurement
The tacho measurement solution utilised a one second sampling window to count the number of pulses. While the measurement solution does have some level of jitter, this was unimportant as the measurement was for indicative purposes.


PSoC Tacho Measurement
PSoC Tacho Measurement

The website documentation for the Delta brushless fan, AFB1212SHE-F00 shows that the fan has 4 poles and two pulses are seen for each complete rotation of the fan. The image below is taken from the fan datasheet.


Delta AFB1212SHE Tacho Output
Delta AFB1212SHE Tacho Output

The Cypress Timer_3 component performs all the counting and is configured to count on rising edges. A copy of the project is available at the end of the blog for anyone wanting to review and improve the design.


PSoC tacho Timer Component Configuration
PSoC tacho Timer Component Configuration

Measurement results of the fan speed were made available on the Kitprog serial connection. 

Measurement Results

While varying the input voltage across the operating range listed on the Delta website, the fan speed was calculated and output to a serial monitor. The DC power consumption was calculated and plotted against the fan speed. 

Shown in the graph below is the almost linear relationship between input voltage and fan speed.


Delta AFB1212SHE Input Voltage vs Fan Speed and Power Consumption
Delta AFB1212SHE Input Voltage vs Fan Speed and Power Consumption

The data listed below represents the points in the graph above. There is also one addition to the table which is Measured RPM. This value was derived using the period of the Tacho waveform to verify the error in the PSoC software measurement.


Measurements with Delta AFB1212SHE
Measurements with Delta AFB1212SHE

Tuesday, 1 May 2018

PSoC 5 Bootloader USB vs UART I2C Speeds

Summary
This purpose of this blog was to test the download speeds of a PSoC 5 development kit using the KitProg I2C, UART and compare the results against the on-board USB to PSoC interface. 

Test Hardware
A Cypress PSoC development kit CY8CKIT-059 was used with a PSoC Creator project that was configured to test the KitProg SCB I2C and UART components, then secondly a SCB UART connected to an external adaptor and lastly USB interfaced directly to the PSoC 5 with the relevant USB component.


CY8CKIT-059 with External UART Header
CY8CKIT-059 with External UART Header
For UART testing which did not use the Kitprog interface a separate USB to Serial converter from Prolific was utilised. The adaptor was the same type, USB to TTL Serial Cable - Debug / Console Cable for Raspberry Pi from Adafruit as used in a previous blog for similar PSoC 4 tests. The TTL connections to the Prolific adaptor, Black wire was connected to 0V, White to pin P1.6 and Green to pin P1.7 of the Cypress Kit.


Prolific USB to TLL Converter
Prolific USB to TLL Converter
For the Kitprog UART connections in PSoC Creator, P12.7 was used for Tx and P12.6 for Rx. Kitprog I2C connections in Creator used P12.1 for SDA and P12.0 for SCL. 

Test Software
As used in a previous blog, a Creator project related to the DS18B20 was used as the bootloadable component for testing. There were some changes moving between the original PSoC 4 based project to the PSoC 5. These changes resulted in a file size change from 20kb to 28kb.

Where possible, the PSoC Creator PSoC 5 example USBFS project had only minimal changes applied. The PLL Clock was adjusted to achieve the best results for the UART clock when PSoC Creator displayed tolerance warnings. 

Reference Download USB
There were no misgivings that a direct USB interface into the PSoC 5 would result in a fast bootloader time - in fact, the result was almost immediate - for such a small bootloadable file!

UART Download
There is a technical document from Cypress regarding the Kitprog hardware bridge communications speeds for the PSoC5 Development Kit. On page 6 of the Kitprog document is a table showing the programming speed limits for the various interfaces, as shown below.


Kitprog User Guide Table 2-3
Kitprog User Guide Table 2-3
Of interest are the maximum speeds for the I2C and UART facilitated by the USB bridge. In the Cypress community forum there is a thread stating that faster communications speeds are possible, however this is not covered by this blog.

It should be noted that the external Prolfic USB to TTL adaptor hardware is capable of data rates far in excess of the 921600 maximum listed in the Cypress Bootloader Host.

Cypress Windows Bootloader Host
For all the download test performed, the Cypress Bootloader Host was used from within PSoC Creator. The other standalone Windows application known as Cypress UART Bootloader application supports baud rates to 115200 only.


Cypress Bootloader Host
Cypress Bootloader Host
Baud Rate Clocks (SCB)
The change to the PLL clock in the Creator project, as shown below, was required for baud rates above 230400 baud. This clock change was implemented due to the warning raised by PSoC Creator relating to clock accuracy.


PSoC Creator Clock Tolerance Warning
PSoC Creator Clock Tolerance Warning

An change to the clock was instigated under the Clock tab in Creator's Design Wide Resources. The PLL Out Clock was reduced from 48Mhz to 44.3MHz when using the UART with the external Prolific adaptor.


PSoC Creator Change to PLL Out Clock
PSoC Creator Change to PLL Out Clock

I2C Configuration
For the Slave I2C, the data rates were changed from 50 to 1000kbps in the PSoC Creator component.


PSoC Creator I2C Component Configuration
PSoC Creator I2C Component Configuration

A corresponding change was made to the Bootloader Host application to match the data rate.


UART Configuration

The UART was configured in the same manner for tests using Kitprog and the Prolific adaptor.


UART SCB Component Configuration
UART SCB Component Configuration
For the Bootloader component the Tx and Rx buffer were configured for 64 bytes as required.

Test Results
Listed below are the test results for the USB, UART and I2C communications.


Cypress Bootloader Download Times for PSoC5
Cypress Bootloader Download Times for PSoC5
A few items should be noted in the above table. Firstly the USB speed is 'constant'. Appropriately the Cypress Bootloader Host application does not display a baud rate option when the PSoC5 USB port is selected. Secondly the Kitprog UART and I2C interfaces operate to 115200 baud and 100,000 khz as detailed by Cypress.

Graphing the results provides a pertinent visual of how much faster the USB interface, shown in blue, is over Kitprog or a standard UART interfaces. The Kitprog I2C interface does deserves an honourable mention as it closer in download times to the USB compared to UART.


Graphed Cypress Bootloader Download Times for USB, I2C and UART
Graphed Cypress Bootloader Download Times for USB, I2C and UART



Code and Project
The code snippet for the Bootloader application as taken from the Cypress USB PSoC 5 example is listed below.

/*******************************************************************************
* File Name: main.c
*
* Version: 3.0
*
* Description:
*  This example project demonstrates the basic operation of the Bootloader and 
*  Bootloadable components when the communication interface is a USB.
*
********************************************************************************
* Copyright 2015, Cypress Semiconductor Corporation. All rights reserved.
* This software is owned by Cypress Semiconductor Corporation and is protected
* by and subject to worldwide patent and copyright laws and treaties.
* Therefore, you may use this software only as provided in the license agreement
* accompanying the software package from which you obtained this software.
* CYPRESS AND ITS SUPPLIERS MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
* WITH REGARD TO THIS SOFTWARE, INCLUDING, BUT NOT LIMITED TO, NONINFRINGEMENT,
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
*******************************************************************************/

#include <main.h>


/*******************************************************************************
* Function Name: main
********************************************************************************
*
* Summary:
*  The main function performs the following actions:
*   1. Indicates that the bootloader project is running by turning on the LED.
*   2. Starts the bootloader component and it waits for the application update. 
*      After 10 seconds, the code jumps to the application if it is available. 
*      Otherwise waits forever for application upload.
*
* Parameters:
*  None.
*
* Return:
*  None.
*
*******************************************************************************/
int main()
{
    /* Indicates that the bootloader is running. */
#if (CY_PSOC4)
    RGB_LED_ON_RED;
#else
    TURN_ON_LED4;
#endif /* (CY_PSOC4) */

    /* Enters the bootloader to wait for the application update. */
    Bootloader_Start();

    /* Bootloader_Start() never returns. */
    for (;;)
    {
    }
}


/* [] END OF FILE */
 

Lastly the PSoC 5 project which contains the Bootloader and Bootloadable applications.


Bootloader - Bootloadable Test Application
Bootloader - Bootloadable Test Application


Saturday, 14 April 2018

PSoC 4 Bootloader UDB vs SCB Speeds

Summary
This purpose of this blog was to test and verify, partially for my own curiosity, the download speeds of I2C, UART and UART operating as RS485 for the PSoC 4 using UDB and SCB type components. Operating the SCB UART in RS485 was not possible as an out of box setup, so this test was omitted.

Test Hardware
A Cypress PSoC development kit CY8CKIT-042 was configured to use the on-board I2C, UART or UART (RS485) using UDB and SCB components.

CY8CKIT-042
CY8CKIT-042 - Courtesy Cypress Semiconductor

For UART testing, a separate USB to Serial converter by 
Prolific was utilised. The model from Adafruit for instance was USB to TTL Serial Cable - Debug / Console Cable for Raspberry Pi. For connecting the TTL end of the Prolific cable, the Black wire was connected to 0V, White to pin P0.5 and Green to pin P0.4 of the Cypress Development Kit.


Prolific USB to TLL Converter
Prolific USB to TLL Converter

Similarly a USB to RS485 converter by FTDI was used in conjunction with a LinkSprite RS485 Rev1 adaptor board to connect between the target PC and the Cypress development board. Some hardware modifications were required on the earlier model LinkSprite for use with the Cypress Development board. These changes were related to the Receive and Transmit Enable lines which needed to be driven from the PSoC using the UDB components TX Enable output. The following link LinkSprite RS485.pdf, shows the modifications made to the LinkSprite Rev 1 board.

FTDI USB-RS485-WE-1800-BT
FTDI USB-RS485-WE-1800-BT

LinkSprite (RS485) Fitted to PSoC Development Board
LinkSprite (RS485) Fitted to PSoC Development Board

From the FTDI RS485 adaptor to the LinkSprite only the Data+ and Data- connections were used, which corresponds to the Orange and Yellow wires, as shown in the image above.

Test Software
An application for the DS18B20 OneWire bus was converted into a bootloadable project for testing. Any project could have been used, this was handy at the time. It should be noted that the programming file .CYACD used for testing was less than 20kb.

As mentioned in the blog introduction, both UDB and SCB communications solutions were tested. Where possible the Cypress project and components were left with minimal changes. Clocks with fractional dividers were used to achieve the best tolerance for the communications rates. Note that other methods of deriving the most desirable clock for the given baud rate were not tried - only minimal changes were made to the project.

Some notes on the testing performed.

Reference Download I2C
In most instances, when using a 042 Cypress Development Kit, the Kitprog hardware interface is used to update the target PSoC device from PSoC Creator. The time to perform an update could be determined from PSoC Creator although it would be unlikely that a field solution would use a Kitprog interface for updating the PSoC. I2C was therefore used as the reference for download speeds on this development kit.

Cypress Windows Bootloader Host
For all of the downloads performed, the Cypress Bootloader Host was used from within PSoC Creator. The Cypress UART Bootloader application does not support baud rates above 115200 at the time of writing.


Cypress Bootloader Host
Cypress Bootloader Host
Baud Rate Clocks (SCB)
The clocks shown below were used for UART testing, with the oversampling setting left at the default of 12, for a range from 57,600 to 921600 baud. This was implemented due to the warning raised by PSoC Creator relating to clock accuracy. All rates below 57,600 did not show a warning relating to tolerance.


PSoC Creator Clock Tolerance Warning
PSoC Creator Clock Tolerance Warning


SCB UART 56,700 Clock Input
SCB UART 56,700 Clock Input


SCB UART 115,200 Clock Input
SCB UART 115,200 Clock Input


SCB UART 230,400 Clock Input
SCB UART 230,400 Clock Input
SCB UART 460,800 Clock Input
SCB UART 460,800 Clock Input
SCB UART 921,600 Clock Input
SCB UART 921,600 Clock Input
Baud Rate Clocks (UDB)
The clocks shown below were used for UART testing from 460,800 to 921600 baud. All rates below 460,800 did not show a tolerance warning.


UDB UART 460,800 Clock Input
UDB UART 460,800 Clock Input
UDB UART 921,600 Clock Input
UDB UART 921,600 Clock Input

I2C Configuration
For the I2C (not EZI2C) the data rates were changed from 50 to 1000kbps in the PSoC Creator component.


PSoC Creator I2C Component Bootloader Configuration
PSoC Creator I2C Component Bootloader Configuration
A corresponding change was made to the Bootloader Host application to match the data rate - example capture of the 1000kbps shown below..


PSoC Creator Bootloader Host I2C 1000kbps
PSoC Creator Bootloader Host I2C 1000kbps
UART Configuration
The UART was configured in the same manner for the UDB and SCB components with the exception of the RS485 TX Enable line which is not available on the SCB component for the PSoC4.


UART SCB Component Basic Configuration
UART SCB Component Basic Configuration
UART SCB Component Advanced Configuration
UART SCB Component Advanced Configuration
The oversampling setting was unchanged at 12 and the Tx and Rx buffer were configured for 64 bytes as required for the Bootloader component.


UART UDB Component Configuration
UART UDB Component Configuration
UART UDB Component Advanced Configuration
UART UDB Component Advanced Configuration
For the UDB component the Tx and Rx buffer were configured for 64 bytes as required for the Bootloader component. When required, the hardware TX Enable output was enable in the UDB component.

Test Results
After all the setup detail above, the results recorded from the Cypress Bootloader application with a PSoC 4 are listed in the table below.


Cypress Bootloader Download Times for UDB and SCB Components
Cypress Bootloader Download Times for UDB and SCB Components
The same tests were conducted several times and it should be noted that there was some variation in the results. As a percentage the variation was no more than five percent.

Graphing the recorded results listed above, the shortest time for download is easily visible, the SCB UART. Coming in a close second is the I2C connection seen on most Cypress development kits. The results do show how dedicated hardware on the PSoC 4 performs notably better than Universal Digital Blocks (UDB).


Graphed Cypress Bootloader Download Times for UDB and SCB Components
Graphed Cypress Bootloader Download Times for UDB and SCB Components
Code and Project
The code snippet for the Bootloader application is listed below.

/* ========================================
 *  Shell code for running the bootloader
 * ========================================
*/

#include "project.h"

int main(void)
{
    CyGlobalIntEnable;      /* Enable global interrupts. */   
    Bootloader_Start();     /* Start bootloader, wait forever */

    for(;;)
    {
    }
}

/* [] END OF FILE */ 

Lastly the project itself which contains the Bootloader and Bootloadable applications.


Bootloader - Bootloadable Test Application
Bootloader - Bootloadable Test Application